ATxmega-B1 XPLAINED: USART TUTORIAL

 XMEGA USART | Embedded Tutorials (wordpress.com)

void init_usart()

{

PORTC_DIR|=0x08; //set the direction of PC3 i.e. TXD0 as output and PC2 i.e. RXD0 as input

USARTC0.BAUDCTRLB = 0x60 + (3269 >> 8);

USARTC0_BAUDCTRLA=3269 & 0x00FF;

//USARTC0.BAUDCTRLB = ((0x03 & 0xf0f) >> 0x08);

//USARTC0.BAUDCTRLB |= ((-4 & 0x0F) << 0x04);

//USARTC0_BAUDCTRLA=0xc5;

USARTC0_CTRLB|=USART_RXEN_bm|USART_TXEN_bm; 

USARTC0_CTRLC|=USART_CHSIZE1_bm|USART_CHSIZE0_bm;

USARTC0.CTRLA = USART_RXCINTLVL_LO_gc;

USARTC0.STATUS |= USART_RXCIF_bm; // 0x80  0b10000000

}

Baud rate calculator for ATxmega

 Baud rate calculator for Xmega (dolman-wim.nl)

ATxmega128a1u /* System Clock Output Port */

 /* System Clock Output Port */

typedef enum PORTCFG_CLKOUT_enum

{

    PORTCFG_CLKOUT_OFF_gc = (0x00<<0),  /* System Clock Output Disabled */

    PORTCFG_CLKOUT_PC7_gc = (0x01<<0),  /* System Clock Output on Port C pin 7 */

    PORTCFG_CLKOUT_PD7_gc = (0x02<<0),  /* System Clock Output on Port D pin 7 */

    PORTCFG_CLKOUT_PE7_gc = (0x03<<0),  /* System Clock Output on Port E pin 7 */

} PORTCFG_CLKOUT_t;

/* Peripheral Clock Output Select */

typedef enum PORTCFG_CLKOUTSEL_enum

{

    PORTCFG_CLKOUTSEL_CLK1X_gc = (0x00<<2),  /* 1x Peripheral Clock Output to pin */

    PORTCFG_CLKOUTSEL_CLK2X_gc = (0x01<<2),  /* 2x Peripheral Clock Output to pin */

    PORTCFG_CLKOUTSEL_CLK4X_gc = (0x02<<2),  /* 4x Peripheral Clock Output to pin */

} PORTCFG_CLKOUTSEL_t;

ATxmega clock Initialize the PLL

  /*

Initialize the PLL

-> 48 MHz output frequency

-> 32 MHz internal oscillator as input

*/

OSC.CTRL |= OSC_RC32MEN_bm;

while(!(OSC.STATUS & OSC_RC32MRDY_bm));

OSC.PLLCTRL = OSC_PLLSRC_RC32M_gc | 0x06;

OSC.CTRL |= OSC_PLLEN_bm;

while(!(OSC.STATUS & OSC_PLLRDY_bm));

CCP = CCP_IOREG_gc; 

CLK.CTRL = CLK_SCLKSEL_PLL_gc;

ATxmega clock Initialize the internal 32 MHz oscillator

  /*

Initialize the internal 32 MHz oscillator

*/

OSC.CTRL |= OSC_RC32MEN_bm;

while(!(OSC.STATUS & OSC_RC32MRDY_bm));

CCP = CCP_IOREG_gc;

CLK.CTRL = CLK_SCLKSEL_RC32M_gc;

ATxmega clock Initialize the internal 2 MHz oscillator

  /*

Initialize the internal 2 MHz oscillator

*/

OSC.CTRL |= OSC_RC2MEN_bm;

while(!(OSC.STATUS & OSC_RC2MRDY_bm));

CCP = CCP_IOREG_gc;

CLK.CTRL = CLK_SCLKSEL_RC2M_gc;

ATxmega clock Initialize the external crystal oscillator

  /*

Initialize the external crystal oscillator

*/

OSC_XOSCCTRL = OSC_XOSCSEL_XTAL_16KCLK_gc | OSC_FRQRANGE_12TO16_gc; 

OSC.CTRL |= OSC_XOSCEN_bm; 

while(!(OSC.STATUS & OSC_XOSCRDY_bm)); 

CCP = CCP_IOREG_gc; CLK.CTRL = CLK_SCLKSEL_XOSC_gc;

/*

Configure the output for the system clock

-> Port C.7

*/

PORTC.DIRSET = (0x01 << 0x07);

PORTCFG.CLKEVOUT |= PORTCFG_CLKOUT_PC7_gc;