2021년 11월 11일 목요일

ATxmega clock Initialize the PLL

  /*

Initialize the PLL

-> 48 MHz output frequency

-> 32 MHz internal oscillator as input

*/

OSC.CTRL |= OSC_RC32MEN_bm;

while(!(OSC.STATUS & OSC_RC32MRDY_bm));

OSC.PLLCTRL = OSC_PLLSRC_RC32M_gc | 0x06;

OSC.CTRL |= OSC_PLLEN_bm;

while(!(OSC.STATUS & OSC_PLLRDY_bm));


CCP = CCP_IOREG_gc; 

CLK.CTRL = CLK_SCLKSEL_PLL_gc;

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